LTC3424 [Linear Systems]

Low Output Voltage 3MHz Micropower Synchronous Boost Converters; 低输出电压为3MHz微功率同步升压转换器
LTC3424
型号: LTC3424
厂家: Linear Systems    Linear Systems
描述:

Low Output Voltage 3MHz Micropower Synchronous Boost Converters
低输出电压为3MHz微功率同步升压转换器

转换器 升压转换器
文件: 总12页 (文件大小:200K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LTC3423/LTC3424  
Low Output Voltage,  
3MHz Micropower Synchronous  
Boost Converters  
U
FEATURES  
DESCRIPTIO  
The LTC®3423 and LTC3424 are high efficiency, fixed  
frequency, step-up DC/DC converters that can regulate  
output voltages as low as 1.5V from a single cell. An  
applied voltage of at least 2.7V to the VDD pin is required  
to power the internal control circuitry.  
1.5V to 5.5V Adjustable Output Voltage  
Synchronous Rectification: Up to 95% Efficiency  
1A Switch Current (LTC3423) or  
2A Switch Current (LTC3424)  
Fixed Frequency Operation Up to 3MHz  
Wide Input Range: 0.5V to 5.5V (Operating)  
The devices include a 0.16N-channel MOSFET switch  
anda0.21P-channelsynchronousrectifier.TheLTC3423  
is intended for applications requiring less than 0.75W of  
outputpowerandtheLTC3424for1.5Worless.Switching  
frequencies up to 3MHz are programmed with an external  
timing resistor and the oscillator can be synchronized to  
an external clock.  
Very Low Quiescent Current: 38µA (Burst Mode®  
Operation)  
No External Schottky Diode Required  
Synchronizable Switching Frequency  
Burst Mode Enable Control  
OPTI-LOOP® Compensation  
Very Low Shutdown Current: <1µA  
Quiescent current is only 38µA in Burst Mode operation,  
maximizing battery life in portable applications. Burst  
Mode operation is user controlled and can be enabled by  
driving the MODE/SYNC pin high. If the MODE/SYNC pin  
has either a clock or is driven low then the operation is at  
constant fixed frequency.  
Small 10-Pin MSUOP Package  
APPLICATIO S  
Pagers  
Handheld Instruments  
Cordless Phones  
Wireless Handsets  
GPS Receivers  
Battery Backup  
Otherfeaturesincludea1µAshutdown,thermalshutdown  
and current limit. The LTC3423 and LTC3424 are available  
in the 10-lead MSOP package. For applications requiring  
an output voltage greater than 2.6V, the LTC3401 and  
LTC3402arerecommendedwithouttheneedofaseparate  
voltage for the VDD pin.  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation.  
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TYPICAL APPLICATIO  
1-Cell to 1.8V at 600mA Step-Up Converter  
V
= 2.7V TO 5.5V  
DD  
L1  
2.2µH  
Efficiency  
V
DD  
V
OUT  
V
= 0.9V TO 1.5V  
IN  
1.8V  
100  
V
= 1.5V  
600mA  
IN  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
LTC3424  
Burst Mode  
OPERATION  
6
10  
3
4
7
8
9
5
R1  
V
SW  
DD  
110k  
V
= 1.2V  
V = 0.9V  
IN  
IN  
SHDN  
V
OUT  
FB  
+
1
C3  
CELL  
V
IN  
44µF  
(2× 22µF)  
2
MODE/SYNC  
V
C
C4  
C1  
2.2µF  
C2  
10µF  
1
470pF  
R2  
249k  
R
GND  
t
C5  
4.7pF  
V
V
= 3.3V  
= 1.8V  
DD  
OUT  
R
30.1k  
RC  
82k  
t
WITH MBRM120T3 SCHOTTKY  
0.1  
1
10  
100  
1000  
C1: TAIYO YUDEN JMK212BJ225MG  
C2: TAIYO YUDEN JMK212BJ106MM  
C3: TAIYO YUDEN JMK325BJ226MM  
L1: SUMIDA CD43-2R2M  
OUTPUT CURRENT (mA)  
0 = FIXED FREQ  
1 = Burst Mode OPERATION  
3223/24 TA02  
3423/24 TA01  
34234f  
1
LTC3423/LTC3424  
W W  
U W  
U W  
U
ABSOLUTE AXI U RATI GS  
PACKAGE/ORDER I FOR ATIO  
(Note 1)  
VIN, VOUT, VDD Voltages.............................. 0.5V to 6V  
SW Voltage ................................................. 0.5V to 6V  
VC, Rt Voltages ......................... 0.5V to (VOUT + 0.3V)  
SHDN, FB, MODE Voltages ......................... 0.5V to 6V  
Operating Temperature Range (Note 2) .. 40°C to 85°C  
Storage Temperature Range ................. 65°C to 125°C  
Lead Temperature (Soldering, 10 sec).................. 300°C  
ORDER PART  
TOP VIEW  
NUMBER  
R
1
2
3
4
5
10 SHDN  
t
MODE  
9
8
7
6
V
C
LTC3423EMS  
LTC3424EMS  
V
FB  
V
V
IN  
SW  
OUT  
DD  
GND  
MS PACKAGE  
10-LEAD PLASTIC MSOP  
MS PART MARKING  
TJMAX = 125°C  
θJA = 130°C/ W 1 LAYER BOARD  
θJA = 100°C/ W 4 LAYER BOARD  
LTQM  
LTQN  
Consult LTC Marketing for parts specified with wider operating temperature ranges.  
ELECTRICAL CHARACTERISTICS  
The denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C.  
VIN = 1.2V, VDD = 3.3V, VOUT = 1.8V, unless otherwise noted.  
PARAMETER  
CONDITIONS  
MIN  
2.7  
TYP  
MAX  
5.5  
5.5  
5.5  
1.28  
50  
UNITS  
V
V
V
Input Voltage Range  
DD  
IN  
Operating Voltage Range  
(Note 4)  
0.5  
V
Output Voltage Adjust Range  
Feedback Voltage  
1.5  
V
1.22  
1.25  
1
V
Feedback Input Current  
V
= 1.25V  
nA  
µA  
µA  
µA  
µA  
µA  
FB  
Quiescent Current—Burst Mode Operation  
Quiescent Current—SHDN  
Quiescent Current—Active  
NMOS Switch Leakage  
V = 0V, MODE/SYNC = 3.3V (Note 3)  
C
38  
65  
SHDN = 0V, Not Including Switch Leakage  
0.1  
440  
0.1  
0.1  
0.16  
0.21  
1
V = 0V, MODE/SYNC = 0V, R = 300k (Note 3)  
C
800  
5
t
PMOS Switch Leakage  
10  
NMOS Switch On Resistance  
PMOS Switch On Resistance  
NMOS Current Limit  
LTC3423  
LTC3424  
1
2
1.6  
2.8  
A
A
Maximum Duty Cycle  
R = 15k  
80  
85  
%
%
t
Minimum Duty Cycle  
0
Frequency Accuracy  
R = 15k  
t
1.6  
1.4  
2
2.4  
MHz  
V
MODE/SYNC Input High  
MODE/SYNC Input Low  
MODE/SYNC Input Current  
Error Amp Transconductance  
0.4  
1
V
V
= 5.5V  
0.01  
85  
µA  
MODE/SYNC  
I = 5µA to 5µA, V = V  
µmhos  
C
FB  
34234f  
2
LTC3423/LTC3424  
ELECTRICAL CHARACTERISTICS  
The denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C.  
VIN = 1.2V, VOUT = 3.3V unless otherwise noted.  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
SHDN Input High  
SHDN Input Low  
SHDN Input Current  
V
= V = V  
1
V
V
SHDN  
IN  
OUT  
0.4  
1
V
= 5.5V  
0.01  
µA  
SHDN  
Note 1: Absolute Maximum Ratings are those values beyond which the life  
of a device may be impaired.  
Note 3: Current is measured into V since the supply current is  
DD  
bootstrapped to the V pin. The outputs are not switching.  
DD  
Note 2: The LTC3423/LTC3424 are guaranteed to meet performance  
specifications from 0°C to 70°C. Specifications over the –40°C to 85°C  
operating temperature range are assured by design, characterization and  
correlation with statistical process controls.  
Note 4: Once the output is started, the IC is not dependant upon the V  
supply.  
IN  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Transient Response  
150mA to 450mA  
Switching Waveform on SW Pin  
VOUT  
100mV/DIV  
ACCOUPLED  
SW  
0.5V/DIV  
450mA  
IOUT  
150mA  
0V  
COUT = 44µF  
L = 2.2µH  
fOSC = 1MHz  
200µs/DIV  
3423/24 G02  
I
LOAD = 500mA 100ns/DIV  
3423/24 G01  
VOUT 1.8V  
Burst Mode Operation  
at 500µA Load  
Burst Mode Operation  
at 10mA Load  
VOUT  
100mV/DIV  
AC COUPLED  
VOUT  
100mV/DIV  
AC COUPLED  
SW  
1V/DIV  
SW  
1V/DIV  
VIN = 1.2V  
VOUT = 1.8V  
COUT = 44µF  
1ms/DIV  
3423/24 G03  
V
IN = 1.2V  
500µs/DIV  
3423/24 G04  
VOUT = 1.8V  
COUT = 44µF  
MODE/SYNC PIN = HIGH  
MODE/SYNC PIN = HIGH  
34234f  
3
LTC3423/LTC3424  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Converter Efficiency 1.2V to 1.8V  
LTC3424 Current Limit  
LTC3423 Current Limit  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
3.4  
3.2  
3.0  
2.8  
2.6  
2.4  
2.2  
2.0  
1.80  
1.75  
1.70  
1.65  
300MHz  
Burst Mode  
OPERATION  
3MHz  
1MHz  
1.60  
1.55  
1.50  
1.45  
1.40  
WITH MBRM120T3 SCHOTTKY  
10 100 1000  
OUTPUT CURRENT (mA)  
0.1  
1
–15  
25  
TEMPERATURE (°C)  
105  
125  
–55  
–15  
25  
TEMPERATURE (°C)  
105  
125  
65  
–55  
65  
3223/24 G05  
3423/24 G06  
3423/24 G07  
EA FB Voltage  
Oscillator Frequency Accuracy  
NMOS RDS(ON)  
1.28  
1.27  
1.26  
1.25  
1.24  
1.23  
1.22  
2.10  
2.05  
2.00  
1.95  
1.90  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
R
= 15k  
V
= 1.8V  
OUT  
DD  
T
V
= 3.3V  
–15  
25  
TEMPERATURE (°C)  
105  
–15  
25  
TEMPERATURE (°C)  
105  
–15  
25  
TEMPERATURE (°C)  
105  
125  
–55  
125  
–55  
125  
–55  
65  
65  
65  
3423/24 G08  
3423/24 G09  
3423/24 G10  
Efficiency Loss Without Schottky  
vs Frequency  
PMOS RDS(ON)  
14  
12  
10  
8
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
V
V
= 1.8V  
OUT  
DD  
T = 25°C  
A
= 3.3V  
6
4
2
0
–15  
25  
105  
1.8  
FREQUENCY (MHz)  
2.6 3.0  
–55  
125  
0.2 0.6  
1.0 1.4  
2.2  
65  
TEMPERATURE (°C)  
3423/24 G11  
3423/24 G12  
34234f  
4
LTC3423/LTC3424  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Shutdown Threshold  
Burst Mode Operation Current  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
0.75  
0.70  
0.65  
0.60  
44  
42  
40  
38  
36  
34  
32  
30  
–15  
25  
105  
–15  
25  
TEMPERATURE (°C)  
105  
125  
–55  
125  
–55  
65  
65  
TEMPERATURE (°C)  
3423/24 G13  
3423/24 G14  
U
U
U
PI FU CTIO S  
Rt (Pin 1): Timing Resistor to Program the Oscillator  
Frequency.  
SW (Pin 4): Switch Pin. Connect inductor and optional  
Schottky diode here. Minimize trace length to keep EMI  
down.  
3 •1010  
fOSC  
=
Hz  
GND (Pin 5): Signal and Power Ground for the IC.  
Rt  
VDD (Pin 6): Power Source for the IC. Typically derived  
fromahighervoltagepowerconverter. Requiresaninput  
of 2.7V to 5.5V. A 2.2µF ceramic bypass capacitor is  
recommended as close to the pins as possible.  
MODE/SYNC (Pin 2): Burst Mode Select and Oscillator  
Synchronization.  
MODE/SYNC = High. Enable Burst Mode operation. The  
inductor peak inductor current will be 400mA and  
returntozerocurrentoneachcycle. DuringBurstMode  
operationtheoperationisvariablefrequency,providing  
a significant efficiency improvement at light loads. It is  
recommended the Burst Mode operation only be en-  
tered once the part has started up.  
VOUT (Pin 7): Output of the Synchronous Rectifier.  
FB (Pin 8): Feedback Pin. Connect resistor divider tap  
here. The output voltage can be adjusted from 1.5V to  
5.5V. The feedback reference voltage is typically 1.25V.  
VC (Pin 9): Error Amp Output. A frequency compensation  
network is connected to this pin to compensate the loop.  
See the section “Compensating the Feedback Loop” for  
guidelines.  
MODE/SYNC = Low. Disable Burst Mode operation and  
maintain low noise, constant frequency operation.  
MODE/SYNC = External CLK. Synchronization of the  
internal oscillator and Burst Mode operation disable. A  
clock pulse width of 100ns to 2µs is required to  
synchronize.  
SHDN(Pin10):Shutdown.Groundingthispinshutsdown  
the IC. Tie to >1V to enable (VDD or digital gate output).  
During shutdown the output voltage will hold up to VIN  
minus a diode drop due to the body diode of the PMOS  
synchronous switch. If the application requires a com-  
plete disconnect during shutdown then refer to section  
“Output Disconnect”.  
VIN (Pin 3): Voltage Sense for Internal Circuitry.  
34234f  
5
LTC3423/LTC3424  
W
BLOCK DIAGRA  
+
1V TO  
+ 0.3  
V
OUT  
OPTIONAL  
V
SW  
IN  
3
4
P
V
OUT  
V
OUT  
7
1.5V TO 5.5V  
ANTICROSS  
CONDITION  
SHDN  
SHUTDOWN  
10  
+
+
N
10mV  
I
SENSE  
AMP  
+
I
ZERO  
AMP  
+
CURRENT  
LIMIT  
GND  
5
6
1
1.6A TYP (LTC3423)  
2.8A TYP (LTC3424)  
+
1.25V  
ERROR  
AMP  
R1  
FB  
CURRENT  
COMP  
8
9
V
+
DD  
V
DD  
2.7V TO 5.5V  
PWM  
LOGIC  
+
SLEEP  
V
C
Σ
Burst Mode  
CONTROL  
R2  
SYNC  
R
t
OSC  
2
MODE/SYNC  
SLOPE COMP  
3423/24 BD  
34234f  
6
LTC3423/LTC3424  
W U U  
APPLICATIO S I FOR ATIO  
U
DETAILED DESCRIPTION  
ZeroCurrentAmp.Thezerocurrentamplifiermonitorsthe  
inductor current to the output and shuts off the synchro-  
nous rectifier once the current is below 50mA, preventing  
negative inductor current.  
TheLTC3423/LTC3424provideshighefficiency,lownoise  
power for applications such as portable instrumentation  
andareidealforapplicationsthatrequireanoutputvoltage  
between 1.5V and 2.6V from a single cell. These products  
are an addition to the LTC3401 and LTC3402 family of  
synchronous boost converters, with the differences being  
theomissionofthepowergoodfunction(PGOOD)andthe  
addition of a VDD input to provide internal power. The IC  
will not start up until the applied voltage on the VDD pin is  
above 2.7V.  
Burst Mode Operation  
Burst Mode operation is when the IC delivers energy to the  
output until it is regulated and then goes into a sleep mode  
where the outputs are off and the IC is consuming only  
38µA. In this mode, the output ripple has a variable  
frequency component with load current and the steady  
state ripple will be typically below 3%.  
The current mode architecture with adaptive slope  
compensation provides ease of loop compensation with  
excellent transient load response. The low RDS(ON), low  
gate charge synchronous switches provides the pulse  
width modulation control at high efficiency.  
During the period where the device is delivering energy to  
theoutput, thepeakcurrentwillbeequalto400mAandthe  
inductorcurrentwillterminateatzerocurrentforeachcycle.  
In this mode the maximum output current is given by:  
V
IN  
Low Noise Fixed Frequency Operation  
IOUT(MAXBURST)  
Amps  
6•VOUT  
Oscillator. The frequency of operation is set through a  
resistor from the Rt pin to ground where f = 3 • 1010/Rt. An  
internally trimmed timing capacitor resides inside the IC.  
The oscillator can be synchronized with an external clock  
inserted on the MODE/SYNC pin. When synchronizing the  
oscillator, the free running frequency must be set to  
approximately 30% lower than the desired synchronized  
frequency. Keeping the sync pulse width below 2µs will  
ensure that Burst Mode operation is disabled.  
Burst Mode operation is user controlled by driving the  
MODE/SYNC pin high to enable and low to disable. It is  
recommended that Burst Mode operation be entered after  
the part has started up.  
COMPONENT SELECTION  
Inductor Selection  
Current Sensing. Lossless current sensing converts the  
peak current signal to a voltage to sum in with the internal  
slope compensation. This summed signal is compared to  
theerroramplifieroutputtoprovideapeakcurrentcontrol  
command for the PWM. The slope compensation in the IC  
is adaptive to the input and output voltage. Therefore, the  
converterprovidestheproperamountofslopecompensa-  
tion to ensure stability and not an excess causing a loss of  
phase margin in the converter.  
The high frequency operation of the LTC3423/LTC3424  
allows the use of small surface mount inductors. The  
minimum inductance value is proportional to the operat-  
ing frequency and is limited by the following constraints:  
V
IN(MIN) VOUT(MAX) – V  
(
IN(MIN)  
)
k
f
L > µH and L >  
H
f •Ripple VOUT(MAX)  
where  
k = 3 for LTC3423, 2 for LTC3424  
Error Amp. The error amplifier is a transconductance  
amplifier with gm = 85µmhos. A simple compensation  
network is placed from the VC pin to ground.  
f = Operating Frequency (Hz)  
Ripple = Allowable Inductor Current Ripple (A)  
VIN(MIN) = Minimum Input Voltage (V)  
VOUT(MAX) = Maximum Output Voltage (V)  
Current Limit. The current limit amplifier will shut the  
NMOS switch off once the current exceeds its threshold.  
The current amplifier delay to output is typically 50ns.  
34234f  
7
LTC3423/LTC3424  
W U U  
U
APPLICATIO S I FOR ATIO  
The inductor current ripple is typically set to 20% to 40%  
of the maximum inductor current.  
where  
IL = Average Inductor Current  
IP = Peak Inductor Current  
For high efficiency, choose an inductor with a high fre-  
quency core material, such as ferrite, to reduce core  
losses. The inductor should have low ESR (equivalent  
series resistance) to reduce the I2R losses and must be  
abletohandlethepeakinductorcurrentatfullloadwithout  
saturating. Molded chokes or chip inductors usually do  
not have enough core to support the peak inductor cur-  
rents in the 1A to 2A region. To minimize radiated noise,  
use a toroid, pot core or shielded bobbin inductor. See  
Table 1 for a list of component suppliers.  
The ESR is usually the most dominant factor for ripple in  
most power converters. The ripple due to capacitor ESR is  
simply given by:  
VRCESR = IP • RESR Volts  
where  
RESR = Capacitor Series Resistance  
Low ESR capacitors should be used to minimize output  
voltage ripple. For surface mount applications, AVX TPS  
series tantalum capacitors and Sanyo POSCAP or Taiyo-  
Yudenceramiccapacitorsarerecommended.Forthrough-  
hole applications Sanyo OS-CON capacitors offer low ESR  
in a small package size. See Table 2 for a list of component  
suppliers.  
Table 1. Inductor Vendor Information  
SUPPLIER  
Coilcraft  
PHONE  
FAX  
WEBSITE  
(847) 639-6400 (847) 639-1469 www.coilcraft.com  
(516) 241-7876 (516) 241-9339 www.coiltronics.com  
Coiltronics  
Murata  
(814) 237-1431 (814) 238-0490 www.murata.com  
(800) 831-9172  
Sumida  
In some layouts it may be required to place a 1µF low ESR  
capacitor as close to the VOUT and GND pins as possible.  
USA: (847) 956-0666 (847) 956-0702 www.japanlink.com  
Japan: 81-3-3607-5111 81-3-3607-5144 sumida  
Table 2. Capacitor Vendor Information  
SUPPLIER  
AVX  
PHONE  
FAX  
WEBSITE  
R
SHDN  
t
(803) 448-9411 (803) 448-1943 www.avxcorp.com  
(619) 661-6322 (619) 661-1055 www.sanyovideo.com  
MODE  
V
C
V
SW  
FB  
OUT  
V
DD  
IN  
Sanyo  
V
IN  
V
DD  
2.7V  
TO 5.5V  
GND  
Taiyo Yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com  
Input Capacitor Selection  
V
OUT  
Theinputfiltercapacitorreducespeakcurrentsdrawnfrom  
theinputsourceandreducesinputswitchingnoise.Inmost  
applications a 3.3µF is sufficient.  
3423/24 F01  
Figure 1. Recommended Component Placement. Traces  
Carrying High Current Are Direct. Trace Area FB and VC Pins  
Are Kept Low. Lead Length to Battery Should be Kept Short  
Output Diode  
The Schottky diode across the synchronous PMOS switch  
isnotrequired,butprovidesalowerdropduringthebreak-  
before-make time (typically 20ns) of the NMOS to PMOS  
transition. The addition of the Schottky diode will improve  
peak efficiency (see graph “Efficiency Loss Without  
Schottky vs Frequency”). Use of a Schottky diode such as  
a MBRM120T3, 1N5817 or equivalent. Since slow recov-  
ery times will compromise efficiency, do not use ordinary  
rectifier diodes.  
Output Capacitor Selection  
The output voltage ripple has several components. The  
bulk value of the capacitor is set to reduce the ripple due  
to charge into the capacitor each cycle. The max ripple due  
to charge is given by:  
IL V (VOUT – V )  
COUT VOUT VOUT • f  
IN  
IN  
Volts  
VRBULK  
=
34234f  
8
LTC3423/LTC3424  
W U U  
APPLICATIO S I FOR ATIO  
U
Operating Frequency Selection  
130mA/100mV, and the LTC3424 is typically 170mA/  
100mV, so the amount of signal injected is proportional to  
the anticipated change of inductor current with load. The  
outer voltage loop performs the remainder of the correc-  
tion, butbecauseoftheloadfeedforwardsignal, therange  
over which it must slew is greatly reduced. This results in  
an improved transient response. A logic level feed forward  
signal, VFF, is coupled through components C5 and R6.  
The amount of feed forward signal is attenuated with  
resistor R6 and is given by the following relationship:  
There are several considerations in selecting the operat-  
ingfrequencyoftheconverter.Thefirstisdeterminingthe  
sensitive frequency bands that cannot tolerate any spec-  
tral noise. For example, in products incorporating RF  
communications, the 455kHz IF frequency is sensitive to  
any noise, therefore switching above 600kHz is desired.  
Somecommunicationshavesensitivityto1.1MHz. Inthis  
case, converter frequencies up to 3MHz may be em-  
ployed.  
The second consideration is the physical size of the  
converter. As the operating frequency goes up, the induc-  
tor and filter caps go down in value and size. The trade off  
is in efficiency since the switching losses due to gate  
charge are going up proportional with frequency.  
VFF R5•V •1.5  
VOUT IOUT  
IN  
R6 ≈  
– R5  
where IOUT = load current change.  
Another operating frequency consideration is whether the  
application can allow “pulse skipping.” In this mode, the  
minimumontimeoftheconvertercannotsupporttheduty  
cycle, so the converter ripple will go up and there will be  
a low frequency component of the output ripple. In many  
applications where physical size is the main criterion then  
running the converter in this mode is acceptable. In  
applications where it is preferred not to enter this mode,  
then the maximum operating frequency is given by:  
V
V
OUT  
IN  
LTC3423/LTC3424  
V
DD  
IN  
6
10  
3
4
7
8
9
5
V
DD  
SW  
SHDN  
V
OUT  
V
IN  
FB  
2
MODE/SYNC  
V
C
C3  
1
R
t
GND  
R5  
VOUT – V  
OUT • tON(MIN)  
IN  
fMAX_NOSKIP  
=
Hz  
C5  
3.3nF  
V
LOAD FEED  
FORWARD  
SIGNAL  
R6  
V
FF  
3423/24 F02  
where tON(MIN) = minimum on time = 140ns  
Figure 2  
Reducing Output Capacitance with a Load Feed  
Forward Signal  
Closing the Feedback Loop  
In many applications the output filter capacitance can be  
reduced for the desired transient response by having the  
device commanding the change in load current, (i.e.  
system microcontroller), inform the power converter of  
the changes as they occur. Specifically, a “load feed  
forward” signal coupled into the VC pin gives the inner  
current loop a head start in providing the change in output  
current. The transconductance of the LTC3423 converter  
attheVC pinwithrespecttotheinductorcurrentistypically  
The LTC3423/LTC3424 uses current mode control with  
internal adaptive slope compensation. Current mode con-  
trol eliminates the 2nd order filter due to the inductor and  
output capacitor exhibited in voltage mode controllers,  
and simplifies it to a single-pole filter response. The  
product of the modulator control to output DC gain plus  
the error amp open-loop gain equals the DC gain of the  
system.  
34234f  
9
LTC3423/LTC3424  
W U U  
U
APPLICATIO S I FOR ATIO  
GDC = GCONTROLOUTPUT • GEA  
The typical error amp compensation is shown in Figure 3.  
The equations for the loop dynamics are as follows:  
2•V  
IOUT  
IN  
GCONTROL  
=
, GEA 2000  
1
fPOLE1  
Hz  
2• π 20106 CC1  
The output filter pole is given by:  
whichisextremelyclose toDC  
1
IOUT  
π VOUT COUT  
fFILTERPOLE  
=
Hz  
fZERO1  
=
Hz  
2• π RZ CC1  
1
where COUT is the output filter capacitor.  
The output filter zero is given by:  
fPOLE2  
Hz  
2• π RZ CC2  
1
fFILTERZERO  
=
Hz  
Refer to Application Note AN76 for more closed loop  
examples.  
2 • π RESR COUT  
where RESR is the capacitor equivalent series resistance.  
A troublesome feature of the boost regulator topology is  
the right half plane zero (RHP) and is given by:  
V
OUT  
1.25V  
+
ERROR  
AMP  
R1  
FB  
8
V
IN  
2 RO  
R2  
V
C
fRHPZ  
=
Hz  
2
9
2• π L•VO  
C
C1  
C
C2  
R
Z
At heavy loads this gain increase with phase lag can occur  
at a relatively low frequency. The loop gain is typically  
rolled off before the RHP zero frequency.  
3423/24 F03  
Figure 3  
U
TYPICAL APPLICATIO  
Typical Application with Output Disconnect  
ZETEX  
FMMT717  
V
IN  
= 0.9V TO 1.5V  
V
OUT  
LTC3423/LTC3424  
3
10  
2
4
7
8
9
5
V
SW  
OUT  
RB*  
IN  
SHDN  
V
C5  
1µF  
MODE/SYNC FB  
6
V
DD  
V
DD  
V
C
1
R
GND  
t
3423/24 TA03  
(V  
– V  
– 0.7V) • 100  
OUTMAX  
OUT  
INMIN  
I
* SET RB TO FORCE BETA OF 100; RB =  
0 = FIXED FREQ  
1 = Burst Mode OPERATION  
34234f  
10  
LTC3423/LTC3424  
U
TYPICAL APPLICATIO  
Single Cell to 1.8V at 300mA, 1.8mm High  
V
= 2.7V TO 5.5V  
V
DD  
L1  
4.7µH  
DD  
IN  
D1  
V
OUT  
V
= 0.9V TO 1.5V  
IN  
1.8V  
300mA  
LTC3423  
6
10  
3
4
7
8
9
5
R1  
V
SW  
DD  
110k  
SHDN  
V
OUT  
FB  
+
1
C3  
22µF  
CELL  
V
IN  
2
MODE/SYNC  
V
C
C4  
C1  
2.2µF  
C2  
4.7µF  
1
470pF  
R2  
249k  
R
GND  
= 1MHz  
t
C5  
4.7pF  
R
30.1k  
R
f
t
C
OSC  
82k  
C1: TAIYO YUDEN JMK212BJ225MG  
C2: TAIYO YUDEN JMK212BJ475MM  
C3: TAIYO YUDEN JMK325BJ226MM  
D1: ON SEMICONDUCTOR MBRM120T3  
L1: SUMIDA CDRH3D16-4R7M  
3423/24 TA04  
0 = FIXED FREQ  
1 = Burst Mode OPERATION  
U
PACKAGE DESCRIPTIO  
MS Package  
10-Lead Plastic MSOP  
(Reference LTC DWG # 05-08-1661)  
0.889 ± 0.127  
(.035 ± .005)  
5.23  
(.206)  
MIN  
3.2 – 3.45  
(.126 – .136)  
3.00 ± 0.102  
(.118 ± .004)  
(NOTE 3)  
0.497 ± 0.076  
(.0196 ± .003)  
REF  
0.50  
3.05 ± 0.38  
(.0120 ± .0015)  
TYP  
(.0197)  
10 9  
8
7 6  
BSC  
RECOMMENDED SOLDER PAD LAYOUT  
3.00 ± 0.102  
(.118 ± .004)  
NOTE 4  
4.88 ± 0.10  
(.192 ± .004)  
DETAIL “A”  
0° – 6° TYP  
0.254  
(.010)  
GAUGE PLANE  
1
2
3
4 5  
0.53 ± 0.01  
(.021 ± .006)  
0.86  
(.034)  
REF  
1.10  
(.043)  
MAX  
DETAIL “A”  
0.18  
(.007)  
SEATING  
PLANE  
0.17 – 0.27  
(.007 – .011)  
0.13 ± 0.05  
(.005 ± .002)  
MSOP (MS) 1001  
0.50  
(.0197)  
TYP  
NOTE:  
1. DIMENSIONS IN MILLIMETER/(INCH)  
2. DRAWING NOT TO SCALE  
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.  
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX  
34234f  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
11  
LTC3423/LTC3424  
U
TYPICAL APPLICATIO  
Triple Output Converter  
D2  
D3  
D4  
D5  
3.6V  
2mA  
4.7µF  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
D6  
D7  
V
= 2.7V TO 5.5V  
DD  
V
L1  
2.2µH  
DD  
IN  
4.7µF  
D1  
V
OUT  
V
= 0.9V TO 1.5V  
IN  
1.8V  
700mA  
–1.1V  
1mA  
LTC3423  
6
10  
3
4
7
8
9
5
R1  
V
SW  
DD  
110k  
SHDN  
V
OUT  
FB  
+
1
C3  
CELL  
V
44µF  
IN  
(2× 22µF)  
2
MODE/SYNC  
V
C
C4  
C1  
2.2µF  
C2  
10µF  
1
470pF  
R2  
249k  
R
GND  
= 1MHz  
t
C5  
4.7pF  
R
30.1k  
RC  
82k  
t
f
OSC  
C1: TAIYO YUDEN JMK212BJ225MG  
C2: TAIYO YUDEN JMK212BJ106MM  
C3: TAIYO YUDEN JMK325BJ226MM  
D1: ON SEMICONDUCTOR MBRM120T3  
3423/24 TA05  
0 = FIXED FREQ  
1 = Burst Mode OPERATION  
D2 TO D7: ZETEX FMND7000 DUAL DIODE  
L1: SUMIDA CD43-2R2M  
RELATED PARTS  
PART NUMBER  
DESCRIPTION  
COMMENTS  
LT1306  
Sync, Fixed Frequency, Step-Up DC/DC Converter  
High Current, Micropower, Single Cell 600kHz DC/DC Converter  
Micropower 600kHz PWM DC/DC Converter  
Internal 2A Switches, V As Low As 1.8V  
IN  
LT1308A/LT1308B  
LT1317/LT1317B  
LT1610  
5V at 1A from Single Li-Ion Cell  
V
As Low As 1.5V, I = 100µA  
Q
IN  
1.7MHz, Single Cell Micropower DC/DC Converter  
3V at 30mA from 1V, 5V at 200mA from 3.3V  
As Low As 1.1V, 3V at 30mA from Single Cell  
TM  
LT1613  
1.4MHz, Single Cell DC/DC Converter in ThinSOT  
V
IN  
LT1615  
Micropower Step-Up DC/DC Converter in ThinSOT  
600kHz, 1A Switch PWM DC/DC Converter  
ThinSOT, 600mA, 1.2MHz Boost Converter  
I = 20µA, 1µA Shutdown Current, V As Low As 1V  
Q IN  
LT1949  
1.1A, 0.5/30V Internal Switch, V As Low As 1.8V  
IN  
LTC3400/LTC3400B  
LTC3401  
92% Efficiency, 0.85V V , 2.6V V  
5V  
IN  
OUT  
Single Cell, High Current (1A) Micropower, Synchronous  
3MHz Step-Up DC/DC Converter  
V = 0.5V to 5.5V, Up to 97% Efficiency Synchronizable  
IN  
Oscillator from 100kHz to 3MHz  
LTC3402  
Single Cell, High Current (2A) Micropower, Synchronous  
3MHz Step-Up DC/DC Converter  
V
IN  
= 0.5V to 5.5V, Up to 97% Efficiency Synchronizable  
Oscillator from 100kHz to 3MHz  
ThinSOT is a trademark of Linear Technology Corporation.  
34234f  
LT/TP 0302 2K • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
12  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  
LINEAR TECHNOLOGY CORPORATION 2001  

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